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There is no way to delay to 1/4th of the tick. The execution is happening almost momentarily in the scale of the tick. You can just change the order in which the gates get evaluated. I’d suggest to try just 2 nots and then see if it works.

Hi Helmut,
There is no any feature that allows you to delay tick for any specific time. However you can reorder clock signal on different consumers by adding chain of even number of not gates.
Eugene

I am sorry, but I do not understand what you are trying to build. If your goal is to implement truth table you have I’d suggest to synthesis it for each output bit separately as you normally do it.

Hi, I think you have a small mistake in your circuit. You need to connect your q output to j input instead of k and ~q to k instead of j. I have seen a few erroneous images of jk flip-flops on the web. You probably found one. Please see this link for the correct circuitry and have fun with your circ...

Yes, I guess it should not be hard. I'll try to do this.

Great work Hans, thank you for sharing this.

Well, it is might be a good idea, but instead I’d suggest to have your circuits smaller. This way it is easier to understand them and you don’t need to color your wires.

Ok, I see it now. On your 8 bit adder you have splitters touching inputs of 4 bit adders. You’ll need to move them apart and connected all the outputs of splitters to inputs of adders. Another problem is you have on the 8 bit add/sub two outputs of 8 bits multiplexer connected together. And this bri...

That might be an indication of disconnected button. If you upload your project here I can try to look at it.

Thanks, that makes sense. I'll see what I can do.