www.logiccircuit.org

The Thread is 2yo but I just created such a circuit. (Without seen the video, if it still exist, since I have no FB account)
Maybe it helps to inspire somebody by this circuit.

Feedback is appreciated.

I just noted that I never posted my first CPU project. Its name is "Daisuki" (Jap: "Big liking"). The CPU is in the category "cpu.ic". I first created "cpu" and ported it to "cpu.ic" based on 7400 series ICs, but later I changed some things in "...

*) It's just a minor thing, but the msi installer doesn't request administrator rights, and the context menu of msi files has no "Start as" entry (Windows 10). Hence, I need each update to start another application like cmd.exe as administrator and use it to start the installer, to install...

Great work, thank you very much!

Description: I'm not sure, but it seems two connected Tristate "Gate" outputs doesn't work together anymore, makes usual Multiplexer impossible. Steps to reproduce: Download the attached save file and execute the circuit "bug.Bugtest". The upper 4 Tristates are enabled and get v...

Thank you. I fixed 2 small Bugs.

Thank you very much. On the Gameboy (modificated Z.80), the only architecture which I know "good", nothing but the interrupt enable and mask is controlled by software. The CPU call every time an interrupt occured and he is enabled a fixed memory offset and interrupt requests have fixed pri...

I'm named it "Heart of Gold", like the Space ship. The CPU contains two internal 32 bit-busses which conntect the components together. I know on this design it's impossible to pipelining, but I think its easier. On the raising edge of the clock cycle the cpu controller prepare the next ste...

Thank you.
You give me indirect an idea.
I'm use edge triggered flipflop and will show it, if the whole circuit work fine.


PS: Happy new year.

Hello. I try to realize an interrupt request circuit. My first idea was to use a SR Latch to store that an irq was send. I'm use a priority decoder to decode the intern interrupt id. On the raising edge of the clock, the flipflop save the inverted oe output (which is low if any input is high). The p...